This rule states that,
” Sum of voltages around a loop is always equal to zero. “
Explanation:
its very simple law as described by given example.
Above example explains it in a well manner as to verify you apply loop analysis on
left hand side loop as it gives
V1= (-17 +10 +4 +3 ) V
which comes out to be
V1= 0 V
so KVL satisfies. Similarly it can be done for right hand side loop.
If u have any problem with this contact me via reply.
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